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general description the MAX1516/max1517/max1518 include a high-perfor- mance step-up regulator, two linear-regulator controllers, and high-current operational amplifiers for active-matrix thin-film transistor (tft) liquid-crystal displays (lcds). also included is a logic-controlled, high-voltage switch with adjustable delay. the step-up dc-dc converter provides the regulated supply voltage for the panel source driver ics. the con- verter is a high-frequency (1.2mhz) current-mode regu- lator with an integrated 14v n-channel mosfet that allows the use of ultra-small inductors and ceramic capacitors. it provides fast transient response to pulsed loads while achieving efficiencies over 85%. the gate-on and gate-off linear-regulator controllers provide regulated tft gate-on and gate-off supplies using external charge pumps attached to the switching node. the max1518 includes five high-performance operational amplifiers, the max1517 includes three, and the MAX1516 includes one operational amplifier. these amplifiers are designed to drive the lcd back- plane (vcom) and/or the gamma-correction divider string. the devices feature high output current (?50ma), fast slew rate (13v/?), wide bandwidth (12mhz), and rail-to-rail inputs and outputs. the MAX1516/max1517/max1518 are available in 32- pin thin qfn packages with a maximum thickness of 0.8mm for ultra-thin lcd panels. applications notebook computer displays lcd monitor panels automotive displays features ? 2.6v to 5.5v input supply range ? 1.2mhz current-mode step-up regulator fast transient response to pulsed load high-accuracy output voltage (1.5%) built-in 14v, 2.4a, 0.16 ? n-channel mosfet high efficiency (90%) ? linear-regulator controllers for v gon and v goff ? high-performance operational amplifiers 150ma output short-circuit current 13v/s slew rate 12mhz, -3db bandwidth rail-to-rail inputs/outputs ? logic-controlled, high-voltage switch with adjustable delay ? timer-delay fault latch for all regulator outputs ? thermal-overload protection ? 0.6ma quiescent current MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ________________________________________________________________ maxim integrated products 1 ordering information step-up controller gate-on controller switch control gate-off controller ref v cn v cp v main lx fb pgnd agnd drvp fbp v cp v gon v cn v goff del ctl drvn fbn neg4 ref pos4 neg5 pos5 out4 out5 bgnd neg2 pos2 op3 pos3 out2 out3 pos1 out1 neg1 sup com drn src comp in v in max1518 op2 op1 op5 op4 minimal operating circuit 19-3244; rev 0; 4/04 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. evaluation kit available part temp range pin-package MAX1516 etj -40 c to +100 c 32 thin qfn 5mm x 5mm max1517 etj -40 c to +100 c 32 thin qfn 5mm x 5mm max1518 etj -40 c to +100 c 32 thin qfn 5mm x 5mm pin configurations appear at end of data sheet. 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. in, ctl to agnd ......................................................-0.3v to +6v comp, fb, fbp, fbn, del, ref to agnd .... -0.3v to (v in + 0.3v) pgnd, bgnd to agnd ......................................................?.3v lx to pgnd ............................................................-0.3v to +14v sup to agnd .........................................................-0.3v to +14v drvp, src to agnd..............................................-0.3v to +30v pos_, neg_, out_ to agnd ...................-0.3v to (v sup + 0.3v) pos1 to neg1, pos2 to neg2, pos3 to neg3, pos4 to neg4, pos5 to neg5 ...............................-6v to +6v drvn to agnd ...................................(v in - 30v) to (v in + 0.3v) com, drn to agnd ................................-0.3v to (v src + 0.3v) drn to com............................................................-30v to +30v out_ maximum continuous output current....................?5ma lx switch maximum continuous rms output current .........1.6a continuous power dissipation (t a = +70?) 32-pin thin qfn (derate 21.2mw/? above +70?) ..1702mw operating temperature range .........................-40? to +100? junction temperature ......................................................+150? storage temperature range .............................-65? to +150? lead temperature (soldering, 10s) .................................+300? electrical characteristics (v in = 3v, v sup = 8v, pgnd = agnd = bgnd = 0, i ref = 25?, t a = 0c to +85c . typical values are at t a = +25?, unless other- wise noted.) parameter symbol conditions min typ max units in supply range v in 2.6 5.5 v in undervoltage-lockout threshold v uvlo v in rising, typical hysteresis = 150mv 2.3 2.5 2.7 v v fb = v fbp = 1.4v, v fbn = 0, lx not switching 0.6 0.8 in quiescent current i in v fb = 1.1v, v fbp = 1.4v, v fbn = 0, lx switching 611 ma duration to trigger fault condition 55 ms ref output voltage -2? < i ref < 50?, v in = 2.6v to 5.5v 1.231 1.250 1.269 v temperature rising +160 thermal shutdown hysteresis 15 c main step-up regulator output voltage range v main v in 13 v operating frequency f osc 1020 1200 1380 khz oscillator maximum duty cycle 84 87 90 % t a = +25 c to +85 c 1.221 1.233 1.245 fb regulation voltage v fb no load t a = 0 c to +85 c 1.218 1.233 1.247 v fb fault trip level v fb falling 0.96 1.00 1.04 v fb load regulation 0 < i main < full load, transient only -1.6 % fb line regulation v in = 2.6v to 5.5v +0.04 0.15 %/ v fb input bias current v fb = 1.4v -40 +40 na fb transconductance ? i comp = 5? 75 150 280 ? fb voltage gain fb to comp 600 v/ v 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers _______________________________________________________________________________________ 3 electrical characteristics (continued) (v in = 3v, v sup = 8v, pgnd = agnd = bgnd = 0, i ref = 25?, t a = 0c to +85c . typical values are at t a = +25?, unless other- wise noted.) parameter symbol conditions min typ max units lx on-resistance r lx ( on ) 160 250 m ? lx leakage current i lx v lx = 13v 0.02 40 ? lx current limit i lim v fb = 1v, duty cycle = 65% 2.5 3.0 3.5 a current-sense transconductance 3.0 3.8 5 s soft-start period t ss 14 ms soft-start step size i lim / 8 a operational amplifiers sup supply range v sup 4.5 13.0 v max1518 3.2 4.8 max1517 2 3 sup supply current i sup buffer configuration, v pos _ = 4v, no load MAX1516 0.7 1.1 ma input offset voltage v os (v neg _, v pos _, v out _) ? v sup / 2, t a = +25 c 012mv input bias current i bias (v neg _ , v pos _, v out _) ? v sup / 2 +1 50 na input common-mode range v cm 0 v sup v common-mode rejection ratio cmrr 0 (v neg _, v pos _) v sup 45 db open-loop gain 125 db i out _ = 100? v sup - 15 v sup - 3 output voltage swing, high v oh i out _ = 5ma v sup - 150 v sup - 80 mv i out _ = -100? 2 15 output voltage swing, low v ol i out _ = -5ma 70 150 mv short-circuit current to v sup / 2, source or sink 50 150 ma output source and sink current (v neg _ , v pos _, v out _) ? v sup / 2, | ? v os | < 10mv 40 ma power-supply rejection ratio psrr dc, 6v v sup 13v, (v neg _, v pos _) ? v sup /2 60 db slew rate 13 v/? -3db bandwidth r l = 10k ? , c l = 10pf, buffer configuration 12 mhz gain-bandwidth product gbw buffer configuration 8 mhz gate-on linear-regulator controller fbp regulation voltage v fbp i drvp = 100? 1.231 1.250 1.269 v fbp fault trip level v fbp falling 0.96 1.00 1.04 v fbp input bias current i fbp v fbp = 1.4v -50 +50 na fbp effective load-regulation error (transconductance) v drvp = 10v, i drvp = 50? to 1ma -0.7 -1.5 % 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 4 _______________________________________________________________________________________ electrical characteristics (continued) (v in = 3v, v sup = 8v, pgnd = agnd = bgnd = 0, i ref = 25?, t a = 0c to +85c . typical values are at t a = +25?, unless other- wise noted.) parameter symbol conditions min typ max units fbp line (in) regulation error i drvp = 100?, 2.6v < v in < 5.5v ?.5 ? mv drvp sink current i drvp v fbp = 1.1v, v drvp = 10v 1 5 ma drvp off-leakage current v fbp = 1.4v, v drvp = 28v 0.01 10 ? soft-start period t ss 14 ms soft-start step size v ref / 128 v gate-off linear-regualtor controller fbn regulation voltage v fbn i drvn = 100? 235 250 265 mv fbn fault trip level v fbn rising 370 420 470 mv fbn input bias current i fbn v fbn = 0 -50 +50 na fbn effective load-regulation error (transconductance) v drvn = -10v, i drvn = 50? to 1ma 11 25 mv fbn line (in) regulation error i drvn = 0.1ma, 2.6v < v in < 5.5v +0.7 ? mv drvn source current i drvn v fbn = 500mv, v drvn = -10v 1 4 ma drvn off-leakage current v fbn = 0v, v drvn = -25v -0.01 -10 ? soft-start period t ss 14 ms soft-start step size v ref / 128 v positive gate-driver timing and control switches del capacitor charge current during startup, v del = 1v 4 5 6 a del turn-on threshold v th ( del ) 1.19 1.25 1.31 v del discharge switch on- resistance during uvlo, v in = 2.2v 20 ? ctl input low voltage v in = 2.6v to 5.5v 0.6 v ctl input high voltage v in = 2.6v to 5.5v 2 v ctl input leakage current ctl = agnd or in -1 +1 ? ctl-to-src propagation delay 100 ns src input voltage range 28 v v del = 1.5v, ctl = in 50 100 src input current i src v del = 1.5v, ctl = agnd 15 30 ? src to com switch on- resistance r src ( on ) v del = 1.5v, ctl = in 6 12 ? drn to com switch on- resistance r drn ( on ) v del = 1.5v, ctl = agnd 35 70 ? com to pgnd switch on- resistance r com ( on ) v del = 1.1v 350 1000 1800 ? 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers _______________________________________________________________________________________ 5 electrical characteristics (v in = 3v, v sup = 8v, pgnd = agnd = bgnd = 0, i ref = 25?, t a = -40c to +85c, unless otherwise noted.) (note 1) parameter symbol conditions min max units in supply range v in 2.6 5.5 v in undervoltage-lockout threshold v uvlo v in rising, typical hysteresis = 150mv 2.265 2.715 v v fb = v fbp = 1.4v, v fbn = 0, lx not switching 0.8 in quiescent current i in v fb = 1.1v, v fbp = 1.4v, v fbn = 0, lx switching 11 ma ref output voltage -2? < i ref < 50?, v in = 2.6v to 5.5v 1.222 1.269 v main step-up regulator output voltage range v main v in 13 v operating frequency f osc 1020 1380 khz fb regulation voltage v fb no load 1.212 1.250 v fb line regulation v in = 2.6v to 5.5v 0.15 %/ v fb input bias current v fb = 1.4v -40 +40 na fb transconductance ? i comp = 5? 75 300 ? lx on-resistance r lx ( on ) 250 m ? lx current limit i lim v fb = 1v, duty cycle = 65% 2.5 3.5 a operational amplifiers sup supply range v sup 4.5 13.0 v max1518 4.8 max1517 3.0 sup supply current i sup buffer configuration, v pos _ = 4v, no load MAX1516 1.1 ma input offset voltage v os (v neg _, v pos _, v out _) ? v sup / 2 12 mv input common-mode range v cm 0 v sup v i out _ = 100? v sup - 15 output voltage swing, high v oh i out _ = 5ma v sup - 150 mv i out _ = -100? 15 output voltage swing, low v ol i out _ = -5ma 150 mv source 50 short-circuit current to v sup / 2 sink 50 ma output source and sink current (v neg _ , v pos _, v out _) ? v sup / 2, | ? v os | < 10mv 40 ma gate-on linear-regulator controller fbp regulation voltage v fbp i drvp = 100? 1.218 1.269 v 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 6 _______________________________________________________________________________________ electrical characteristics (continued) (v in = 3v, v sup = 8v, pgnd = agnd = bgnd = 0, i ref = 25?, t a = -40c to +85c, unless otherwise noted.) (note 1) parameter symbol conditions min max units fbp effective load-regulation error (transconductance) v drvp = 10v, i drvp = 50? to 1ma -2 % fbp line (in) regulation error i drvp = 100?, 2.6v < v in < 5.5v 5 mv drvp sink current i drvp v fbp = 1.1v, v drvp = 10v 1 ma gate-off linear-regulator controller fbn regulation voltage v fbn i drvn = 100? 235 265 mv fbn effective load-regulation error (transconductance) v drvn = -10v, i drvn = 50? to 1ma 25 mv fbn line (in) regulation error i drvn = 0.1ma, 2.6v < v in < 5.5v 5 mv drvn source current i drvn v fbn = 500mv, v drvn = -10v 1 ma positive gate-driver timing and control switches del capacitor charge current during startup, v del = 1v 4 6 ? del turn-on threshold v th ( del ) 1.19 1.31 v ctl input low voltage v in = 2.6v to 5.5v 0.6 v ctl input high voltage v in = 2.6v to 5.5v 2 v src input voltage range 28 v v del = 1.5v, ctl = in 100 src input current i src v del = 1.5v, ctl = agnd 30 ? src to com switch on- resistance r src ( on ) v del = 1.5v, ctl = in 12 ? drn to com switch on- resistance r drn ( on ) v del = 1.5v, ctl = agnd 70 ? com to pgnd switch on- resistance r com ( on ) v del = 1.1v 350 1800 ? note 1: specifications to -40? are guaranteed by design, not production tested. 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers _______________________________________________________________________________________ 7 step-up efficiency vs. load current MAX1516 toc01 load current (ma) efficiency (%) 100 10 40 50 60 70 80 90 100 30 1 1000 v in = 5.0v v out = 13v v in = 3.3v switching frequency vs. input voltage MAX1516 toc02 input voltage (v) switching frequency (mhz) 5.0 4.5 4.0 3.5 3.0 1.1 1.2 1.3 1.4 1.0 2.5 5.5 step-up supply current vs. supply voltage MAX1516 toc03 supply voltage (v) supply current (ma) 5.0 4.5 4.0 3.5 3.0 2 4 6 8 10 0 2.5 5.5 no load, sup disconnected, r1 = 95.3k ? , r2 = 10.2k ? current into inductor current into in pin step-up regulator soft-start (heavy load) MAX1516 toc04 2ms/div a: v in , 5v/div b: v main , 5v/div c: inductor current, 1a/div 0v a b 0v c 0a 10 s/div step-up regulator pulsed load-transient response 13v 200ma c MAX1516 toc05 b 0a a a: load current, 1a/div b: v main , 200mv/div, ac-coupled c: inductor current, 1a/div t ypical operating characteristics (circuit of figure 1. v in = 5v, v main = 13v, v gon = 24v, v goff = -8v, v out1 = v out2 = v out3 = v out4 = v out5 = 6.5v, t a = +25? unless otherwise noted.) 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 8 _______________________________________________________________________________________ timer delay latch response to overload MAX1516 toc06 10ms/div a: v main , 5v/div b: inductor current, 1a/div 0v a b 0a 55ms ref voltage load regulation MAX1516 toc07 load current ( a) ref voltage (v) 40 30 20 10 1.248 1.249 1.250 1.251 1.252 1.253 1.247 050 gate-on regulator line regulation MAX1516 toc08 input voltage (v) output voltage error (%) 29 28 27 26 25 24 -0.8 -0.6 -0.4 -0.2 0 0.2 -1.0 23 30 v gon = 23.5v i gon = 20ma gate-on regulator load regulation MAX1516 toc09 load current (ma) voltage error (%) 15 10 5 -0.25 -0.20 -0.15 -0.10 -0.05 0 -0.30 020 gate-off regulator line regulation MAX1516 toc10 input voltage (v) output voltage error (%) -10 -12 -14 0 0.25 0.50 0.75 1.00 -0.25 -16 -8 v goff = -8v i goff = 50ma gate-off regulator load regulation MAX1516 toc11 load current (ma) voltage error (%) 40 30 20 10 -0.8 -0.6 -0.4 -0.2 0 -1.0 050 t ypical operating characteristics (continued) (circuit of figure 1. v in = 5v, v main = 13v, v gon = 24v, v goff = -8v, v out1 = v out2 = v out3 = v out4 = v out5 = 6.5v, t a = +25? unless otherwise noted.) 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers _______________________________________________________________________________________ 9 4ms/div power-up sequence 0v 0v c MAX1516 toc12 b 0v a a: v main , 10v/div b: v src , 20v/div c: v goff , 10v/div d: v gon , 20v/div 0v d max1518 operational-amplifier supply current vs. supply voltage MAX1516 toc13 supply voltage (v) supply current (ma) 8.0 7.5 7.0 6.5 6.0 1 2 3 4 5 6 0 4.5 8.5 no-load buffer configuration v pos1 to v pos5 = v sup / 2 40 s/div operational-amplifier rail-to-rail input/output 0v MAX1516 toc14 b 0v a a: input signal, 2v/div b: output signal, 2v/div v sup = 6v t ypical operating characteristics (continued) (circuit of figure 1. v in = 5v, v main = 13v, v gon = 24v, v goff = -8v, v out1 = v out2 = v out3 = v out4 = v out5 = 6.5v, t a = +25? unless otherwise noted.) 400ns/div operational-amplifier load-transient response 0v MAX1516 toc15 b -50ma a a: output voltage, 1v/div, ac-coupled b: output current, 50ma/div +50ma 0 1 s/div operational-amplifier large-signal step response 0v MAX1516 toc16 b a a: input signal, 2v/div b: output signal, 2v/div 0v v sup = 6v 400ns/div operational-amplifier small-signal step response 0v MAX1516 toc17 b a a: input signal, 100mv/div b: output signal, 100mv/div 0v 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 10 ______________________________________________________________________________________ pin description name pin MAX1516 max1517 max1518 function 1 src src src switch input. source of the internal high-voltage p-channel mosfet. bypass src to pgnd with a minimum 0.1? capacitor close to the pins. 2 ref ref ref reference bypass terminal. bypass ref to agnd with a minimum of 0.22? close to the pins. 3 agnd agnd agnd analog ground for step-up regulator and linear regulators. connect to power ground (pgnd) underneath the ic. 4 pgnd pgnd pgnd power ground. pgnd is the source of the main step-up n-channel power mosfet. connect pgnd to the input-capacitor ground terminals through a short, wide pc board trace. connect to analog ground (agnd) underneath the ic. 5 out1 out1 out1 operational-amplifier 1 output 6 neg1 neg1 neg1 operational-amplifier 1 inverting input 7 pos1 pos1 pos1 operational-amplifier 1 noninverting input 8 n.c. out2 out2 operational-amplifier 2 output for the max1518 and max1517. not internally connected for the MAX1516. 9 n.c. neg2 neg2 operational-amplifier 2 inverting input for the max1518 and max1517. not internally connected for the MAX1516. 10 i. c. pos2 pos2 operational-amplifier 2 noninverting input for the max1518 and max1517. internally connected for the MAX1516. connect this pin to gnd for the MAX1516. 11 bgnd bgnd bgnd analog ground for operational amplifiers. connect to power ground (pgnd) underneath the ic. 12 n.c. n.c. pos3 operational-amplifier 3 noninverting input for the max1518. not internally connected for the max1517 and MAX1516. 13 n.c. n.c. out3 operational-amplifier 3 output. not internally connected for the max1517 and MAX1516. 14 sup sup sup operational-amplifier power input. positive supply rail for the operational amplifiers. typically connected to v main . bypass sup to bgnd with a 0.1? capacitor. 15 n.c. pos3 pos4 operational-amplifier 4 noninverting input for the max1518. operational-amplifier 3 noninverting input for the max1517. not internally connected for the MAX1516. 16 n.c. neg3 neg4 operational-amplifier 4 inverting input for the max1518. operational-amplifier 3 inverting input for the max1517. not internally connected for the MAX1516. 17 n.c. out3 out4 operational-amplifier 4 output for the max1518. operational-amplifier 3 output for the max1517. not internally connected for the MAX1516. 18 i. c. i. c. pos5 operational-amplifier 5 noninverting input for the max1518. internally connected for the max1517 and MAX1516. connect this pin to gnd for the max1517 and MAX1516. 19 n.c. n.c. neg5 operational-amplifier 5 inverting input. not internally connected for the max1517 and MAX1516. 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 11 pin description (continued) name pin MAX1516 max1517 max1518 function 20 n.c. n.c. out5 operational-amplifier 5 output. not internally connected for the max1517 and MAX1516. 21 lx lx lx n-channel power mosfet drain and switching node. connect the inductor and schottky diode to lx and minimize the trace area for lowest emi. 22 in in in supply voltage input. in can range from 2.6v to 5.5v. 23 fb fb fb step-up regulator feedback input. regulates to 1.236v (nominal). connect a resistive voltage-divider from the output (v main ) to fb to analog ground (agnd). place the divider within 5mm of fb. 24 comp comp comp step-up regulator error-amplifier compensation point. connect a series rc from comp to agnd. see the loop compensation section for component selection guidelines. 25 fbp fbp fbp gate-on linear-regulator feedback input. fbp regulates to 1.25v (nominal). connect fbp to the center of a resistive voltage-divider between the regulator output and agnd to set the gate-on linear-regulator output voltage. place the resistive voltage-divider close to the pin. 26 drvp drvp drvp gate-on linear-regulator base drive. open drain of an internal n-channel mosfet. connect drvp to the base of an external pnp pass transistor. see the pass-transistor selection section. 27 fbn fbn fbn gate-off linear-regulator feedback input. fbn regulates to 250mv (nominal). connect fbn to the center of a resistive voltage-divider between the regulator output and ref to set the gate-off linear-regulator output voltage. place the resistive voltage- divider close to the pin. 28 drvn drvn drvn gate-off linear-regulator base drive. open drain of an internal p-channel mosfet. connect drvn to the base of an external npn pass transistor. see the pass-transistor selection section. 29 del del del high-voltage switch delay input. connect a capacitor from del to agnd to set the high-voltage switch startup delay. 30 ctl ctl ctl high-voltage switch control input. when ctl is high, the high-voltage switch between com and src is on and the high-voltage switch between com and drn is off. when ctl is low, the high-voltage switch between com and src is off and the high-voltage switch between com and drn is on. ctl is inhibited by the undervoltage lockout and when the voltage on del is less than 1.25v. 31 drn drn drn switch input. drain of the internal high-voltage back-to-back p-channel mosfets connected to com. 32 com com com internal high-voltage mosfet switch common terminal. do not allow the voltage on com to exceed v src . 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 12 ______________________________________________________________________________________ t ypical operating circuit the max1518 typical operating circuit (figure 1) is a complete power-supply system for tft lcds. the cir- cuit generates a +13v source-driver supply and +24v and -8v gate-driver supplies. the input voltage range for the ic is from +2.6v to +5.5v. the listed load cur- rents in figure 1 are available from a +4.5v to +5.5v supply. table 1 lists some recommended components, and table 2 lists the contact information of component suppliers. detailed description the MAX1516/max1517/max1518 contain a high- performance step-up switching regulator, two low-cost linear-regulator controllers, multiple high-current opera- tional amplifiers, and startup timing and level-shifting functionality useful for active-matrix tft lcds. figure 2 shows the max1518 functional diagram . main step-up regulator the main step-up regulator employs a current-mode, fixed-frequency pwm architecture to maximize loop bandwidth and provide fast transient response to pulsed loads typical of tft-lcd panel source drivers. the 1.2mhz switching frequency allows the use of low- profile inductors and ceramic capacitors to minimize the thickness of lcd panel designs. the integrated high-efficiency mosfet and the ic? built-in digital soft-start functions reduce the number of external com- ponents required while controlling inrush currents. the output voltage can be set from v in to 13v with an exter- nal resistive voltage-divider. to generate an output volt- age greater than 13v, an external cascoded mosfet is needed. see the generating output voltages > 13v section in the design procedures . the regulator controls the output voltage and the power delivered to the output by modulating the duty cycle (d) of the internal power mosfet in each switching cycle. the duty cycle of the mosfet is approximated by: figure 3 shows the functional diagram of the step-up regulator. an error amplifier compares the signal at fb to 1.236v and changes the comp output. the voltage at comp sets the peak inductor current. as the load varies, the error amplifier sources or sinks current to the comp output accordingly to produce the inductor peak current necessary to service the load. to maintain sta- bility at high duty cycles, a slope-compensation signal is summed with the current-sense signal. on the rising edge of the internal clock, the controller sets a flip-flop, turning on the n-channel mosfet and applying the input voltage across the inductor. the cur- rent through the inductor ramps up linearly, storing energy in its magnetic field. once the sum of the cur- rent-feedback signal and the slope compensation exceeds the comp voltage, the controller resets the flip-flop and turns off the mosfet. since the inductor current is continuous, a transverse potential develops across the inductor that turns on the diode (d1). the voltage across the inductor then becomes the differ- ence between the output voltage and the input voltage. d vv v main in main ? designation description c1 22?, 6.3v x5r ceramic capacitor (1210) tdk c3225x5r0j227m c2 22?, 16v x5r ceramic capacitor (1812) tdk c4532x5x1c226m d1 3a, 30v schottky diode (m-flat) toshiba cms02 d2, d3 200ma, 100v, dual ultra-fast diodes (sot23) fairchild mmbd4148se l1 3.0?, 3a inductor sumida cdrh6d28-3r0 q1 200ma, 40v pnp bipolar transistor (sot23) fairchild mmbt3906 q2 200ma, 40v npn bipolar transistor (sot23) fairchild mmbt3904 table 1. component list supplier phone fax website fairchild 408-822-2000 408-822-2102 www.fairchildsemi.com sumida 847-545-6700 847-545-6720 www.sumida.com tdk 847-803-6100 847-390-4405 www.component.tdk.com toshiba 949-455-2000 949-859-3963 www.toshiba.com/taec table 2. component suppliers 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 13 0.1 f 0.1 f 0.1 f lx d1 l1 3.0 h lx c2 22 f d2 v main 13v/500ma r1 95.3k ? 1% r1 10.2k ? 1% 6.8k ? r4 192k ? 1% r5 10.0k ? 1% q1 0.47 f v gon 24v/20ma 0.1 f lx v in 4.5v to 5.5v d3 q2 c1 22 f 220 f c18 0.1 f r10 10 ? 180k ? 6.8k ? 0.1 f r7 332k ? 1% r8 40.2k ? 1% 0.22 f 0.22 f v goff -8v/50ma 0.033 f to vcom backplane in comp drvn fbn ref fb agnd pgnd drvp fbp src com lx del neg1 neg2 out2 out3 neg4 out4 neg5 out5 out1 drn ctl sup bgnd pos1 pos2 pos3 pos4 pos5 max1518 figure 1. typical operating circuit 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 14 ______________________________________________________________________________________ step-up controller gate-on controller switch control gate-off controller ref v cn v cp v main lx fb pgnd agnd drvp fbp v cp v gon v cn v goff del ctl drvn fbn neg4 ref pos4 neg5 pos5 out4 out5 bgnd neg2 pos2 op3 pos3 out2 out3 pos1 out1 neg1 sup com drn src comp in v in max1518 op2 op1 op5 op4 figure 2. max1518 functional diagram 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 15 this discharge condition forces the current through the inductor to ramp back down, transferring the energy stored in the magnetic field to the output capacitor and the load. the mosfet remains off for the rest of the clock cycle. gate-on linear-regulator controller, reg p the gate-on linear-regulator controller (reg p) is an analog gain block with an open-drain n-channel output. it drives an external pnp pass transistor with a 6.8k ? base-to-emitter resistor (figure 1). its guaranteed base- drive sink current is at least 1ma. the regulator including q1 in figure 1 uses a 0.47? ceramic output capacitor and is designed to deliver 20ma at 24v. other output voltages and currents are possible with the proper pass transistor and output capacitor. see the pass-transistor selection and stability requirements sections. reg p is typically used to provide the tft-lcd gate drivers?gate-on voltage. use a charge pump with as many stages as necessary to obtain a voltage exceed- ing the required gate-on voltage (see the selecting the number of charge-pump stages section). note the voltage rating of the drvp is 28v. if the charge-pump output voltage can exceed 28v, an external cascode npn transistor should be added as shown in figure 4. alternately, the linear regulator can control an interme- diate charge-pump stage while regulating the final charge-pump output (figure 5). reg p is enabled after the ref voltage exceeds 1.0v. each time it is enabled, the controller goes through a soft-start routine that ramps up its internal reference dac in 128 steps. q r s reset dominant current sense oscillator slope comp clock lx pgnd fb comp 1.236v 1.0v soft- start v limit pwm comparator fault comparator ilim comparator to fault latch error amp figure 3. step-up regulator functional diagram 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 16 ______________________________________________________________________________________ gate-off linear-regulator controller, reg n the gate-off linear-regulator controller (reg n) is an analog gain block with an open-drain p-channel output. it drives an external npn pass transistor with a 6.8k ? base-to-emitter resistor (figure 1). its guaranteed base- drive source current is at least 1ma. the regulator including q2 in figure 1 uses a 0.47? ceramic output capacitor and is designed to deliver 50ma at -8v. other output voltages and currents are possible with the proper pass transistor and output capacitor (see the pass- transistor selection and stability requirements sections). reg n is typically used to provide the tft-lcd gate drivers?gate-off voltage. a negative voltage can be produced using a charge-pump circuit as shown in figure 1. reg n is enabled after the voltage on ref exceeds 1.0v. each time it is enabled, the control goes through a soft-start routine that ramps down its internal reference dac from v ref to 250mv in 128 steps. operational amplifiers the max1518 has five operational amplifiers, the max1517 has three operational amplifiers, and the MAX1516 has one operational amplifier. the operational amplifiers are typically used to drive the lcd backplane (vcom) or the gamma-correction divider string. they feature 150ma output short-circuit current, 13v/? slew rate, and 12mhz bandwidth. the rail-to-rail input and output capability maximizes system flexibility. short-circuit current limit the operational amplifiers limit short-circuit current to approximately 150ma if the output is directly shorted to sup or to bgnd. if the short-circuit condition persists, the junction temperature of the ic rises until it reaches the thermal-shutdown threshold (+160 c typ). once the junc- tion temperature reaches the thermal-shutdown threshold, an internal thermal sensor immediately sets the thermal fault latch, shutting off all the ic? outputs. the device remains inactive until the input voltage is cycled. driving pure capacitive load the operational amplifiers are typically used to drive the lcd backplane (vcom) or the gamma-correction divider string. the lcd backplane consists of a distrib- uted series capacitance and resistance, a load that can be easily driven by the operational amplifier. however, if the operational amplifier is used in an application with a pure capacitive load, steps must be taken to ensure stable operation. as the operational amplifier? capacitive load increases, the amplifier? bandwidth decreases and gain peaking increases. a 5 ? to 50 ? small resistor placed between out_ and the capacitive load reduces peaking but also reduces the gain. an alternative method of reducing peaking is to place a series rc network (snubber) in par- allel with the capacitive load. the rc network does not continuously load the output or reduce the gain. typical values of the resistor are between 100 ? and 200 ? , and the typical value of the capacitor is 10nf. MAX1516 max1517 max1518 drvp fbp v main from charge-pump output npn cascode transistor pnp pass transistor v gon figure 4. using cascoded npn for charge-pump output voltages >28v MAX1516 max1517 max1518 drvp fbp v gon 35v lx v main 13v 0.22 f 0.1 f 0.1 f 0.47 f 267k ? 1% 10.0k ? 1% 6.8k ? q1 figure 5. the linear regulator controls the intermediate charge- pump stage. 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 17 undervoltage lockout (uvlo) the undervoltage-lockout (uvlo) circuit compares the input voltage at in with the uvlo threshold (2.5v rising, 2.35v falling, typ) to ensure the input voltage is high enough for reliable operation. the 150mv (typ) hysteresis prevents supply transients from causing a restart. once the input voltage exceeds the uvlo rising threshold, startup begins. when the input voltage falls below the uvlo falling threshold, the controller turns off the main step-up regulator, turns off the linear-regulator outputs, and disables the switch control block; the operational- amplifier outputs are high impedance. reference voltage (ref) the reference output is nominally 1.25v and can source at least 50? (see the typical operating characteristics ). bypass ref with a 0.22? ceramic capacitor connected between ref and agnd. power-up sequence and soft-start once the voltage on in exceeds approximately 1.7v, the reference turns on. with a 0.22? ref bypass capacitor, the reference reaches its regulation voltage of 1.25v in approximately 1ms. when the reference voltage exceeds 1.0v, the ics enable the main step-up regulator, the gate-on linear-regulator controller, and the gate-off linear-regulator controller simultaneously. the ic employs soft-start for each regulator to minimize inrush current and voltage overshoot and to ensure a well-defined startup behavior. during the soft-start, the main step-up regulator directly limits the peak inductor current. the current-limit level is increased through the soft-start period from 0 up to the full current-limit value in eight equal current steps (ilim / 8). the maximum load current is available after the output voltage reach- es regulation (which terminates soft-start), or after the soft-start timer expires. both linear-regulator controllers use a 7-bit soft-start dac. for the gate-on linear regula- tor, the dac output is stepped in 128 steps from zero up to the reference voltage. for the gate-off linear regu- lator, the dac output steps from the reference down to 250mv in 128 steps. the soft-start duration is 14ms (typ) for all three regulators. a capacitor (c del ) from del to agnd determines the switch-control-block startup delay. after the input volt- age exceeds the uvlo threshold (2.5v typ) and the soft-start routine for each regulator is complete and there is no fault detected, a 5? current source starts charging c del . once the capacitor voltage exceeds 1.25v (typ), the switch-control block is enabled as shown in figure 6. after the switch-control block is enabled, com can be connected to src or drn through the internal p-channel switches, depending upon the state of ctl. before startup and when in is less than v uvlo , del is internally connected to agnd to discharge c del . select c del to set the delay time using the following equation: switch-control block the switch-control input (ctl) is not activated until all four of the following conditions are satisfied: the input voltage exceeds v uvlo , the soft-start routine of all the regulators is complete, there is no fault condition detected, and v del exceeds its turn-on threshold. as shown in figure 7, com is pulled down to pgnd through a 1k ? resistor when the switch control is not activated. once activated and if ctl is high, the 5 ? internal p-channel switch (q1) between com and src turns on and the 30 ? p-channel switch (q2) between drn and com turns off. if ctl is low, q1 turns off and q2 turns on. c delay time a v del = _ . 5 125 12ms 2.5v 1.05v 1.25v v in v ref v main v gon v goff v del switch control enabled soft- start ends soft- start begins input voltage ok figure 6. power-up sequence 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 18 ______________________________________________________________________________________ fault protection during steady-state operation, if the output of the main regulator or any of the linear-regulator outputs does not exceed its respective fault-detection threshold, the MAX1516/max1517/max1518 activate an internal fault timer. if any condition or combination of conditions indi- cates a continuous fault for the fault-timer duration (55ms typ), the MAX1516/max1517/max1518 set the fault latch to shut down all the outputs except the refer- ence. once the fault condition is removed, cycle the input voltage (below the uvlo falling threshold) to clear the fault latch and reactivate the device. the fault- detection circuit is disabled during the soft-start time. thermal-overload protection thermal-overload protection prevents excessive power dissipation from overheating the MAX1516/max1517/ max1518. when the junction temperature exceeds t j = +160 c, a thermal sensor immediately activates the fault protection, which shuts down all outputs except the reference, allowing the device to cool down. once the device cools down by approximately 15 c, cycle the input voltage (below the uvlo falling threshold) to clear the fault latch and reactivate the device. the thermal-overload protection protects the controller in the event of fault conditions. for continuous opera- tion, do not exceed the absolute maximum junction temperature rating of t j = +150 c. MAX1516 max1517 max1518 fb ok fbp ok fbn ok 2.5v 5 a ref drn com src q1 q2 q3 1k ? ctl del in figure 7. switch-control block 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 19 design procedure main step-up regulator inductor selection the minimum inductance value, peak current rating, and series resistance are factors to consider when selecting the inductor. these factors influence the con- verter? efficiency, maximum output load capability, transient-response time, and output voltage ripple. size and cost are also important factors to consider. the maximum output current, input voltage, output volt- age, and switching frequency determine the inductor value. very high inductance values minimize the cur- rent ripple and therefore reduce the peak current, which decreases core losses in the inductor and i 2 r losses in the entire power path. however, large induc- tor values also require more energy storage and more turns of wire, which increases size and can increase i 2 r losses in the inductor. low inductance values decrease the size but increase the current ripple and peak current. finding the best inductor involves choos- ing the best compromise between circuit efficiency, inductor size, and cost. the equations used here include a constant lir, which is the ratio of the inductor peak-to-peak ripple current to the average dc inductor current at the full load cur- rent. the best trade-off between inductor size and cir- cuit efficiency for step-up regulators generally has an lir between 0.3 and 0.5. however, depending on the ac characteristics of the inductor core material and ratio of inductor resistance to other power-path resis- tances, the best lir can shift up or down. if the induc- tor resistance is relatively high, more ripple can be accepted to reduce the number of turns required and increase the wire diameter. if the inductor resistance is relatively low, increasing inductance to lower the peak current can decrease losses throughout the power path. if extremely thin high-resistance inductors are used, as is common for lcd-panel applications, the best lir can increase to between 0.5 and 1.0. once a physical inductor is chosen, higher and lower values of the inductor should be evaluated for efficien- cy improvements in typical operating regions. calculate the approximate inductor value using the typ- ical input voltage (v in ), the maximum output current (i main(max) ), the expected efficiency ( typ ) taken from an appropriate curve in the typical operating characteristics section, and an estimate of lir based on the above discussion: choose an available inductor value from an appropriate inductor family. calculate the maximum dc input cur- rent at the minimum input voltage (v in(min) ) using con- servation of energy and the expected efficiency at that operating point ( min ) taken from the appropriate curve in the typical operating characteristics : calculate the ripple current at that operating point and the peak current required for the inductor: the inductor? saturation current rating and the MAX1516/max1517/max1518s?lx current limit (i lim ) should exceed i peak , and the inductor? dc current rating should exceed i in(dc,max) . for good efficiency, choose an inductor with less than 0.1 ? series resistance. considering the typical operating circuit , the maximum load current (i main(max) ) is 500ma with a 13v output and a typical input voltage of 5v. choosing an lir of 0.5 and estimating efficiency of 85% at this operating point: using the circuit? minimum input voltage (4.5v) and estimating efficiency of 80% at that operating point: the ripple current and the peak current are: i vvv hv mhz a ia a a ripple peak = ? ? =+ 45 13 45 33 13 12 074 18 074 2 22 .( .) .. . . . . i av v a in dcmax (, ) . .. . = 05 13 45 08 18 l v v vv a mhz h = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 5 13 13 5 05 12 085 05 33 2 .. . . . i vvv lv f ii i ripple in min main in min main osc peak in dcmax ripple = ? =+ () () (, ) () 2 i iv v in dcmax main max main in min min (, ) () () = l v v vv if lir in main main in main max osc typ = ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? 2 () i 2 r is a registered trademark of instruments for research and industry, inc. 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 20 ______________________________________________________________________________________ output-capacitor selection the total output voltage ripple has two components: the capacitive ripple caused by the charging and discharg- ing of the output capacitance, and the ohmic ripple due to the capacitor? equivalent series resistance (esr). where i peak is the peak inductor current (see the inductor selection section). for ceramic capacitors, the output voltage ripple is typically dominated by v ripple(c) . the voltage rating and temperature charac- teristics of the output capacitor must also be considered. input-capacitor selection the input capacitor (c in ) reduces the current peaks drawn from the input supply and reduces noise injec- tion into the ic. a 22? ceramic capacitor is used in the typical applications circuit (figure 1) because of the high source impedance seen in typical lab setups. actual applications usually have much lower source impedance since the step-up regulator often runs directly from the output of another regulated supply. typically, c in can be reduced below the values used in the typical applications circuit . ensure a low-noise supply at in by using adequate c in . alternately, greater voltage variation can be tolerated on c in if in is decoupled from c in using an rc lowpass filter (see r10 and c18 in figure 1). rectifier diode the MAX1516/max1517/max1518s?high switching fre- quency demands a high-speed rectifier. schottky diodes are recommended for most applications because of their fast recovery time and low forward voltage. in general, a 2a schottky diode complements the internal mosfet well. output-voltage selection the output voltage of the main step-up regulator can be adjusted by connecting a resistive voltage-divider from the output (v main ) to agnd with the center tap connect- ed to fb (see figure 1). select r2 in the 10k ? to 50k ? range. calculate r1 with the following equation: where v fb , the step-up regulator? feedback set point, is 1.236v. place r1 and r2 close to the ic. generating output voltages >13v the maximum output voltage of the step-up regulator is 13v, which is limited by the absolute maximum rating of the internal power mosfet. to achieve higher output voltages, an external n-channel mosfet can be cascod- ed with the internal fet (figure 8). since the gate of the external fet is biased from the input supply, use a logic- level fet to ensure that the fet is fully enhanced at the minimum input voltage. the current rating of the fet needs to be higher than the ic? internal current limit. loop compensation choose r comp to set the high-frequency integrator gain for fast transient response. choose c comp to set the integrator zero to maintain loop stability. for low-esr output capacitors, use the following equa- tions to obtain stable performance and good transient response: to further optimize transient response, vary r comp in 20% steps and c comp in 50% steps while observing transient-response waveforms. charge pumps selecting the number of charge-pump stages for highest efficiency, always choose the lowest num- ber of charge-pump stages that meet the output requirement. figures 9 and 10 show the positive and negative charge-pump output voltages for a given v main for one-, two-, and three-stage charge pumps. the number of positive charge-pump stages is given by: where n pos is the number of positive charge-pump stages, v gon is the gate-on linear-regulator reg p out- put, v main is the main step-up regulator output, v d is the forward-voltage drop of the charge-pump diode, and v dropout is the dropout margin for the linear reg- ulator. use v dropout = 0.3v. n vv v vv pos gon dropout main main d = + ? ? 2 r vv c li c vc ir comp in out out main max comp out out main max comp 315 10 () () rr v v main fb 12 1 = ? ? ? ? ? ? ? vv v v i c vv vf and vir ripple ripple c ripple esr ripple c main out main in main osc ripple esr peak esr cout =+ ? ? ? ? ? ? ? () ( ) () () ( ) , 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 21 the number of negative charge-pump stages is given by: where n neg is the number of negative charge-pump stages, v goff is the gate-off linear-regulator reg n output, v main is the main step-up regulator output, v d is the forward-voltage drop of the charge-pump diode, and v dropout is the dropout margin for the linear reg- ulator. use v dropout = 0.3v. the above equations are derived based on the assumption that the first stage of the positive charge pump is connected to v main and the first stage of the negative charge pump is connected to ground. sometimes fractional stages are more desirable for bet- ter efficiency. this can be done by connecting the first stage to v in or another available supply. if the first charge-pump stage is powered from v in , then the above equations become: flying capacitors increasing the flying-capacitor (c x ) value lowers the effective source impedance and increases the output- current capability. increasing the capacitance indefi- nitely has a negligible effect on output-current capabili- ty because the internal switch resistance and the diode impedance place a lower limit on the source imped- ance. a 0.1? ceramic capacitor works well in most low-current applications. the flying capacitor? voltage rating must exceed the following: where n is the stage number in which the flying capaci- tor appears, and v main is the output voltage of the main step-up regulator. charge-pump output capacitor increasing the output capacitance or decreasing the esr reduces the output ripple voltage and the peak-to- peak transient voltage. with ceramic capacitors, the output voltage ripple is dominated by the capacitance value. use the following equation to approximate the required capacitor value: where c out_cp is the output capacitor of the charge pump, i load_cp is the load current of the charge pump, and v ripple_cp is the peak-to-peak value of the output ripple. charge-pump rectifier diodes use low-cost silicon switching diodes with a current rat- ing equal to or greater than two times the average charge-pump input current. if it helps avoid an extra stage, some or all of the diodes can be replaced with schottky diodes with an equivalent current rating. linear-regulator controllers output-voltage selection adjust the gate-on linear-regulator (reg p) output volt- age by connecting a resistive voltage-divider from the reg p output to agnd with the center tap connected to fbp (figure 1). select the lower resistor of the divider r5 in the range of 10k ? to 30k ? . calculate the upper resistor r4 with the following equation: where v fbp = 1.25v (typ). rr v v gon fbp 45 1 = ? ? ? ? ? ? ? c i fv out cp load cp osc ripple cp _ _ _ 2 vnv cx main > n vv v vv n vv v vv pos gon dropout in main d neg goff dropout in main d = ++ ? = ? ++ ? 2 2 n vv vv neg goff dropout main d = ? + ? 2 step-up controller MAX1516 max1517 max1518 pgnd fb lx v main >13v v in figure 8. operation with output voltages >13v using cascoded mosfet 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 22 ______________________________________________________________________________________ adjust the gate-off linear-regulator reg n output volt- age by connecting a resistive voltage-divider from v goff to ref with the center tap connected to fbn (figure 1). select r8 in the range of 20k ? to 50k ? . calculate r7 with the following equation: where v fbn = 250mv, v ref = 1.25v. note that ref can only source up to 50?; using a resistor less than 20k ? for r8 results in higher bias current than ref can supply. pass-transistor selection the pass transistor must meet specifications for current gain (h fe ), input capacitance, collector-emitter saturation voltage and power dissipation. the transistor? current gain limits the guaranteed maximum output current to: where i drv is the minimum guaranteed base-drive cur- rent, v be is the transistor? base-to-emitter forward volt- age drop, and r be is the pullup resistor connected between the transistor? base and emitter. furthermore, the transistor? current gain increases the linear regula- tor? dc loop gain (see the stability requirements sec- tion), so excessive gain destabilizes the output. therefore, transistors with current gain over 100 at the maximum output current can be difficult to stabilize and are not recommended unless the high gain is needed to meet the load-current requirements. the transistor? saturation voltage at the maximum out- put current determines the minimum input-to-output voltage differential that the linear regulator can support. also, the package? power dissipation limits the usable maximum input-to-output voltage differential. the maxi- mum power-dissipation capability of the transistor? package and mounting must exceed the actual power dissipated in the device. the power dissipated equals the maximum load current (i load(max)_lr ) multiplied by the maximum input-to-output voltage differential: where v in(max)_lr is the maximum input voltage of the linear regulator, and v out _ lr is the output voltage of the linear regulator. stability requirements the MAX1516/max1517/max1518 linear-regulator con- trollers use an internal transconductance amplifier to drive an external pass transistor. the transconductance amplifier, the pass transistor, the base-emitter resistor, and the output capacitor determine the loop stability. the following applies to both linear-regulator controllers in the MAX1516/max1517/max1518. pi v v load max lr in max lr out lr = ? ()_ ()_ _ () ii v r h load max drv be be fe min () () = ? ? ? ? ? ? ? rr vv vv fbn goff ref fbn 78 = ? ? positive charge-pump output voltage vs. v main v main (v) g_on (v) 12 10 8 6 4 10 20 30 40 50 60 0 214 2-stage charge pump 3-stage charge pump v d = 0.3v to 1v 1-stage charge pump figure 9. positive charge-pump output voltage vs. v main negative charge-pump output voltage vs. v main v main (v) g_off (v) 12 10 8 6 4 -40 -35 -30 -25 -20 -15 -10 -5 -0 -45 214 1-stage charge pump 2-stage charge pump 3-stage charge pump v d = 0.3v to 1v figure 10. negative charge-pump output voltage vs. v main 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 23 the transconductance amplifier regulates the output voltage by controlling the pass transistor? base cur- rent. the total dc loop gain is approximately: where v t is 26mv at room temperature, and i bias is the current through the base-to-emitter resistor (r be ). for the MAX1516/max1517/max1518, the bias currents for both the gate-on and gate-off linear-regulator controllers are 0.1ma. therefore, the base-to-emitter resistor for both linear regulators should be chosen to set 0.1ma bias current: the output capacitor and the load resistance create the dominant pole in the system. however, the internal amplifier delay, pass transistor? input capacitance, and the stray capacitance at the feedback node create additional poles in the system, and the output capaci- tor? esr generates a zero. for proper operation, use the following equations to verify the linear regulator is properly compensated: 1) first, determine the dominant pole set by the linear regulator? output capacitor and the load resistor: the unity-gain crossover of the linear regulator is: f crossover = a v_lr ? f pole_lr 2) the pole created by the internal amplifier delay is approximately 1mhz: f pole_amp = 1mhz 3) next, calculate the pole set by the transistor? input capacitance, the transistor? input resistance, and the base-to-emitter pullup resistor: g m is the transconductance of the pass transistor, and f t is the transition frequency. both parameters can be found in the transistor? data sheet. because r be is much greater than r in , the above equation can be simplified: substituting for c in and r in yields: 4) next, calculate the pole set by the linear regula- tor? feedback resistance and the capacitance between fb_ and agnd (including stray capaci- tance): where c fb is the capacitance between fb_ and agnd, r upper is the upper resistor of the linear regulator? feedback divider, and r lower is the lower resistor of the divider. 5) next, calculate the zero caused by the output capacitor? esr: where r esr is the equivalent series resistance of c out_lr . to ensure stability, choose c out_lr large enough so the crossover occurs well before the poles and zero calculated in steps 2 to 5. the poles in steps 3 and 4 generally occur at several megahertz, and using ceramic capacitors ensures the esr zero occurs at several megahertz as well. placing the crossover below 500khz is sufficient to avoid the amplifier-delay pole and generally works well, unless unusual component choices or extra capacitances move one of the other poles or the zero below 1mhz. f cr pole esr out lr esr _ _ = 1 2 f cr r pole fb fb upper lower _ (|| ) = 1 2 f f h pole in t fe _ = f cr pole in in in _ = 1 2 where c g f r h g in m t in fe m == 2 ,, f crr pole in in be in _ (||) = 1 2 f i cv pole lr load max lr out lr out lr _ ()_ __ = 2 r v ma v ma k be be == 01 07 01 68 . . . . ? a v ih i v vlr t bias fe load lr ref _ _ ? ? ? ? ? ? ? + ? ? ? ? ? ? ? ? ? ? ? ? ? ? 10 1 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers 24 ______________________________________________________________________________________ applications information power dissipation an ic? maximum power dissipation depends on the thermal resistance from the die to the ambient environ- ment and the ambient temperature. the thermal resis- tance depends on the ic package, pc board copper area, other thermal mass, and airflow. the MAX1516/max1517/max1518, with their exposed backside pad soldered to 1in 2 of pc board copper, can dissipate about 1.7w into +70 c still air. more pc board copper, cooler ambient air, and more airflow increase the possible dissipation, while less copper or warmer air decreases the ic? dissipation capability. the major components of power dissipation are the power dissipated in the step-up regulator and the power dissipated by the operational amplifiers. step-up regulator the largest portions of power dissipation in the step-up regulator are the internal mosfet, the inductor, and the output diode. if the step-up regulator has 90% efficiency, about 3% to 5% of the power is lost in the internal mosfet, about 3% to 4% in the inductor, and about 1% in the output diode. the remaining 1% to 3% is distrib- uted among the input and output capacitors and the pc board traces. if the input power is about 5w, the power lost in the internal mosfet is about 150mw to 250mw. operational amplifier the power dissipated in the operational amplifiers depends on their output current, the output voltage, and the supply voltage: where i out_(source) is the output current sourced by the operational amplifier, and i out_(sink) is the output current that the operational amplifier sinks. in a typical case where the supply voltage is 13v and the output voltage is 6v with an output source current of 30ma, the power dissipated is 180mv. pc board layout and grounding careful pc board layout is important for proper opera- tion. use the following guidelines for good pc board layout: minimize the area of high-current loops by placing the inductor, the output diode, and the output capacitors near the input capacitors and near the lx and pgnd pins. the high-current input loop goes from the positive terminal of the input capacitor to the inductor, to the ic? lx pin, out of pgnd, and to the input capacitor? negative terminal. the high- current output loop is from the positive terminal of the input capacitor to the inductor, to the output diode (d1), and to the positive terminal of the output capacitors, reconnecting between the output capac- itor and input capacitor ground terminals. connect these loop components with short, wide connec- tions. avoid using vias in the high-current paths. if vias are unavoidable, use many vias in parallel to reduce resistance and inductance. create a power-ground island (pgnd) consisting of the input and output capacitor grounds, pgnd pin, and any charge-pump components. connect all of these together with short, wide traces or a small ground plane. maximizing the width of the power- ground traces improves efficiency and reduces out- put voltage ripple and noise spikes. create an analog ground plane (agnd) consisting of the agnd pin, all the feedback-divider ground connec- tions, the operational-amplifier divider ground con- nections, the comp and del capacitor ground connections, and the device? exposed backside pad. connect the agnd and pgnd islands by con- necting the pgnd pin directly to the exposed back- side pad. make no other connections between these separate ground planes. place all feedback voltage-divider resistors as close to their respective feedback pins as possible. the divider? center trace should be kept short. placing the resistors far away causes their fb traces to become antennas that can pick up switching noise. take care to avoid running any feedback trace near lx or the switching nodes in the charge pumps. place the in pin and ref pin bypass capacitors as close to the device as possible. the ground connec- tion of the in bypass capacitor should be connected directly to the agnd pin with a wide trace. minimize the length and maximize the width of the traces between the output capacitors and the load for best transient responses. ? inimize the size of the lx node while keeping it wide and short. keep the lx node away from feed- back nodes (fb, fbp, and fbn) and analog ground. use dc traces to shield if necessary. refer to the max1518 evaluation kit for an example of proper pc board layout. chip information transistor count: 4608 process: bicmos pd i v v pd i v source out source sup out sink out sink out = ? = _( ) _ _( ) _ () 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers ______________________________________________________________________________________ 25 8 out2 max1517 thin qfn 5mm x 5mm 4 pgnd 3 agnd 2 ref 1 src 5 out1 6 neg1 7 pos1 28 drvn 27 fbn 26 drvp 25 fbp 29 del 30 ctl 31 drn 32 com 20 n.c. 19 n.c. 18 i.c. 17 out3 21 lx 22 in 23 fb 24 comp 13 n.c. 14 sup 15 pos3 16 neg3 12 n.c. 11 bgnd 10 pos2 9 neg2 top view n.c. = not internally connected i.c. = internally connected pin configurations 8 n.c. MAX1516 thin qfn 5mm x 5mm 4 pgnd 3 agnd 2 ref 1 src 5 out1 6 neg1 7 pos1 28 drvn 27 fbn 26 drvp 25 fbp 29 del 30 ctl 31 drn 32 com 20 n.c. 19 n.c. 18 i.c. 17 n.c. 21 lx 22 in 23 fb 24 comp 13 n.c. 14 sup 15 n.c. 16 n.c. 12 n.c. 11 bgnd 10 i.c. 9 n.c. top view n.c. = not internally connected i.c. = internally connected 8 out2 max1518 thin qfn 5mm x 5mm 4 pgnd 3 agnd 2 ref 1 src 5 out1 6 neg1 7 pos1 28 drvn 27 fbn 26 drvp 25 fbp 29 del 30 ctl 31 drn 32 com 20 out5 19 neg5 18 pos5 17 out4 21 lx 22 in 23 fb 24 comp 13 out3 14 sup 15 pos4 16 neg4 12 pos3 11 bgnd 10 pos2 9 neg2 top view 4 .com u datasheet
MAX1516/max1517/max1518 tft-lcd dc-dc converters with operational amplifiers maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 26 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2004 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (the package drawing(s) in this data sheet may not reflect the most current specifications. for the latest package outline info rmation, go to www.maxim-ic.com/packages .) qfn thin.eps d2 (nd-1) x e e d c pin # 1 i.d. (ne-1) x e e/2 e 0.08 c 0.10 c a a1 a3 detail a 0.15 c b 0.15 c a e2/2 e2 0.10 m c a b pin # 1 i.d. b 0.35x45 l d/2 d2/2 l c l c e e l c c l k k l l e 1 2 21-0140 package outline 16, 20, 28, 32, 40l, thin qfn, 5x5x0.8mm detail b l l1 e common dimensions 3.35 3.15 t2855-1 3.25 3.35 3.15 3.25 max. 3.20 exposed pad variations 3.00 t2055-2 3.10 d2 nom. min. 3.20 3.00 3.10 min. e2 nom. max. ne nd pkg. codes 1. dimensioning & tolerancing conform to asme y14.5m-1994. 2. all dimensions are in millimeters. angles are in degrees. 3. n is the total number of terminals. 4. the terminal #1 identifier and terminal numbering convention shall conform to jesd 95-1 spp-012. details of terminal #1 identifier are optional, but must be located within the zone indicated. the terminal #1 identifier may be either a mold or marked feature. 5. dimension b applies to metallized terminal and is measured between 0.25 mm and 0.30 mm from terminal tip. 6. nd and ne refer to the number of terminals on each d and e side respectively. 7. depopulation is possible in a symmetrical fashion. 8. coplanarity applies to the exposed heat sink slug as well as the terminals. 9. drawing conforms to jedec mo220, except exposed pad dimension for t2855-1, t2855-3 and t2855-6. notes: symbol pkg. n l1 e e d b a3 a a1 k 10. warpage shall not exceed 0.10 mm. jedec t1655-1 3.20 3.00 3.10 3.00 3.10 3.20 0.70 0.80 0.75 4.90 4.90 0.25 0.25 0 -- 4 whhb 4 16 0.35 0.30 5.10 5.10 5.00 0.80 bsc. 5.00 0.05 0.20 ref. 0.02 min. max. nom. 16l 5x5 3.10 t3255-2 3.00 3.20 3.00 3.10 3.20 2.70 t2855-2 2.60 2.60 2.80 2.70 2.80 e 2 2 21-0140 package outline 16, 20, 28, 32, 40l, thin qfn, 5x5x0.8mm l 0.30 0.50 0.40 -- - -- - whhc 20 5 5 5.00 5.00 0.30 0.55 0.65 bsc. 0.45 0.25 4.90 4.90 0.25 0.65 - - 5.10 5.10 0.35 20l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-1 28 7 7 5.00 5.00 0.25 0.55 0.50 bsc. 0.45 0.25 4.90 4.90 0.20 0.65 - - 5.10 5.10 0.30 28l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. -- - whhd-2 32 8 8 5.00 5.00 0.40 0.50 bsc. 0.30 0.25 4.90 4.90 0.50 - - 5.10 5.10 32l 5x5 0.20 ref. 0.75 0.02 nom. 0 0.70 min. 0.05 0.80 max. - 40 10 10 5.00 5.00 0.20 0.50 0.40 bsc. 0.40 0.25 4.90 4.90 0.15 0.60 5.10 5.10 0.25 40l 5x5 0.20 ref. 0.75 nom. 0 0.70 min. 0.05 0.80 max. 0.20 0.25 0.30 - 0.35 0.45 0.30 0.40 0.50 down bonds allowed no yes 3.10 3.00 3.20 3.10 3.00 3.20 t2055-3 3.10 3.00 3.20 3.10 3.00 3.20 t2055-4 t2855-3 3.15 3.25 3.35 3.15 3.25 3.35 t2855-6 3.15 3.25 3.35 3.15 3.25 3.35 t2855-4 2.60 2.70 2.80 2.60 2.70 2.80 t2855-5 2.60 2.70 2.80 2.60 2.70 2.80 t2855-7 2.60 2.70 2.80 2.60 2.70 2.80 3.20 3.00 3.10 t3255-3 3.20 3.00 3.10 3.20 3.00 3.10 t3255-4 3.20 3.00 3.10 3.40 3.20 3.30 t4055-1 3.20 3.30 3.40 no no no no no no no no yes yes yes yes yes 3.20 3.00 t1655-2 3.10 3.00 3.10 3.20 yes 4 .com u datasheet

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